1 UT54ACTS157E quadruple 2 to 1 multiplexers july 2013 www.aeroflex.com/logic features ? ???? m crh cmos process - latchup immune ? high speed ? low power consumption ? wide power supply operating range of 3.0v to 5.5v ? available qml q or v processes ? 16-lead flatpack ? UT54ACTS157E-smd-5962-96553 description the UT54ACTS157E is a monolithic data selector/multiplexer. a 4-bit word is selected from one of two sources and is routed to the four outputs. a separate strobe input, g , is provided. the device is characterized over full hirel temperature range of -55 ? c to +125 ? c. function table pinouts 16-lead flatpack top view logic symbol inputs output strobe g select a /b data a b y h x x x l l l l x l l l h x h l h x l l l h x h h 1 2 3 4 5 7 6 16 15 14 13 12 10 11 v dd a /b 1a 1b 1y 2a 2b 2y g 4a 4b 4y 3a 3b v ss 3y 8 9 (15) g (1) a /b g1 en mux note: 1. logic symbol in accordance with ansi/ieee std 91-1984 and iec publication 617-12. (2) 1a 1 (3) 1b 1 (5) 2a (6) 2b (11) 3a (10) 3b (14) 4a (13) 4b (4) 1y (7) 2y (9) 3y (12) 4y
2 logic diagram (12) (9) (4) (7) 1a 1b 2a 2b 3a 3b 4a 4b strobe g select a /b (2) (3) (5) (6) (11) (10) (14) (13) (15) (1) 1y 2y 3y 4y
3 operational environment 1 notes: 1. logic will not latchup during radiation expo sure within the limits defined in the table. 2. device storage elements are immune to seu affects. absolute maximum ratings 1 note: 1. stresses outside the listed absolute maxi mum ratings may cause permanent damage to the device. this is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational s ections is not recommended. ex posure to absolute maximum ra ting conditions for extended periods may affect device reliability. 2. per mil-std-883, method 1012.1, section 3.4.1, p d = (t j(max) - t c(max) ) / ? jc recommended operating conditions parameter limit units total dose 1.0e6 rads(si) seu threshold 2 108 mev-cm 2 /mg sel threshold 120 mev-cm 2 /mg neutron fluence 1.0e14 n/cm 2 symbol parameter limit units v dd supply voltage -0.3 to 7.0 v v i/o voltage any pin -0.3 to v dd +0.3 v t stg storage temperature range -65 to +150 ? c t j maximum junction temperature +175 ? c t ls lead temperature (soldering 5 seconds) +300 ? c ? jc thermal resistance junction to case 15 ? c/w i i dc input current ? 10 ma p d 2 maximum package power dissipation permitted @ tc = +125 o c 3.3 w symbol parameter limit units v dd supply voltage 3.0 to 5.5 v v in input voltage any pin 0 to v dd v t c temperature range -55 to + 125 ? c
4 dc electrical characteristics for the UT54ACTS157E 7 ( v dd = 3.0v to 5.5v; v ss = 0v 6 ; -55 ? c < t c < +125 ? c) symbol description condition min max unit v il1 low-level input voltage 1 v dd from 4.5v to 5.5v 0.8 v v il2 low-level input voltage 1 v dd from 3.0v to 3.6v 0.8 v v ih1 high-level input voltage 1 v dd from 4.5v to 5.5v 0.5 v dd v v ih2 high-level input voltage 1 v dd from 3.0v to 3.6v 2.0 v i in input leakage current v in = v dd or v ss -1 1 ? a v ol1 low-level output voltage 3 i ol = 8ma v dd = 4.5v to 5.5v 0.4 v v ol2 low-level output voltage 3 i ol = 6ma v dd = 3.0v to 3.6v 0.4 v v oh1 high-level output voltage 3 i oh = -8ma v dd from 4.5v to 5.5v 0.7 v dd v v oh2 high-level output voltage 3 i oh = -6ma v dd from 3.0v to 3.6v 2.4 v i os1 short-circuit output current 2 ,4 v o = v dd and v ss v dd from 3.0v to 3.6v -200 200 ma i os2 short-circuit output current 2 ,4 v o = v dd and v ss v dd from 3.0v to 3.6v -100 100 ma i ol1 low level output current 9 v in = v dd or v ss v ol = 0.4v v dd from 4.5v to 5.5v 8 ma i ol2 low level output curren 9 v in = v dd or v ss v ol = 0.4v v dd from 3.0v to 3.6v 6 ma i oh1 high level output current 9 v in = v dd or v ss v oh = v dd -0.4v v dd from 4.5v to 5.5v -8 ma
5 notes: 1. functional tests are conducted in accordance with mil-std-883 with th e following input test conditions: v ih = v ih (min) + 20%, - 0%; v il = v il (max) + 0%, - 50%, as specified herein, for ttl, cmos, or sc hmitt compatible inputs. devices may be test ed using any input voltage within the abov e specified range, but are guaranteed to v ih (min) and v il (max). 2. supplied as a design limit but not guaranteed or tested. 3. per mil-prf-38535, for current density ? 5.0e5 amps/cm 2 , the maximum product of load capa citance (per output buffer) times frequency should not exceed 3,765 pf/mhz. 4. not more than one output may be shorted at a time for maximum duration of one second. 5. capacitance measured for initial qualificat ion and when design changes may affect th e value. capacitance is measured between the designated terminal and v ss at a frequency of 1mhz and a signal amplitude of 50mv rms maximum. 6. maximum allowable relative shift equals 50mv. 7. all specifications valid for the maximum radia tion dose available for th e respective device types. 8. power dissipation specified per switching output. 9. guaranteed by character ization, but not tested. i oh2 9 high level output current v in = v dd or v ss v oh = v dd -0.4v v dd from 3.0v to 3.6v -6 ma p total1 power dissipation 2, 8 c l = 50pf v dd = 4.5v to 5.5v 1.3 mw/ mh z p total2 power dissipation 2, 8 c l = 50pf v dd = 3.0v to 3.6v 0.75 mw/ mh z i ddq quiescent supply current v in = v dd or v ss v dd from 3.0v to 5.5v 10 ? a ? i ddq quiescent supply current delta for input under test v in = v dd -2.1v for all other inputs v in = v dd or v ss v dd = 5.5v 1.6 ma c in input capacitance 5 ? = 1mhz, v dd = 0v 15 pf c out output capacitance 5 ? = 1mhz, v dd = 0v 15 pf
6 ac electrical characteristics for UT54ACTS157E 2 (v dd = 5.0v ? ? 10%; v ss = 0v 1 , -55 ? c < t c < +125 ? c) notes: 1. maximum allowable relative shift equals 50mv. 2. all specifications valid for the maximum radia tion dose available for the respective device types. symbol parameter condition v dd minimum maximum unit t phl1 ma or mb to my c l =50pf 3.0v to 3.6v 3 20 ns 4.5v to 5.5v 2 11 t plh1 ma or mb to my c l =50pf 3.0v to 3.6v 3 18 ns 4.5v to 5.5v 2 10 t phl2 g to my c l =50pf 3.0v to 3.6v 3 18 ns 4.5v to 5.5v 2 10 t plh2 g to my c l =50pf 3.0v to 3.6v 3 18 ns 4.5v to 5.5v 2 10 t phl3 a /b to my c l =50pf 3.0v to 3.6v 3 19 ns 4.5v to 5.5v 2 11 t plh3 a /b to my c l =50pf 3.0v to 3.6v 3 17 ns 4.5v to 5.5v 2 10
7 packaging
8 ordering information: UT54ACTS157E: smd drawing number: 96553 = UT54ACTS157E device type: 02 = 1 rad(si)/sec package type: x = 16-lead ceramic botto m-brazed dual-in-line flatpack lead finish: (notes 1 & 2) a = solder c = gold x = optional 5962 ***** ** * * * * total dose: (note 3 and 4) r = 1e5 rads(si) f = 3e5 rads(si) g = 5e5 rads(si) h = 1e6 rads(si) 03 = 50 to 300 rads(si)/sec class designator: q = qml class q v = qml class v notes: 1. lead finish (a,c, or x) must be specified. 2. if an ?x? is specified when ordering, part marking will match the lead finish and will be either ?a? (solder) or ?c? (gold). 3. total dose radiation must be specified when ordering. qml q and qml v not available without radiation hardening. for prototy pe inquiries, contact factory. 4. device type 02 is only offered with a tid tolerance guarantee of 3e5 rads(si) or 1e6 rads(si) and is tested in accordance wi th mil-std-883 test method 1019 condition a and section 3.11.2. device type 03 is only offered with a tid tolerance guarantee of 1e5 rads(si), 3e5 rads(si), and 5e5 rads(si), and is tested in accordance w ith mil-std-883 test method 1019 condition a.
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